JPH035095B2 - - Google Patents

Info

Publication number
JPH035095B2
JPH035095B2 JP61064604A JP6460486A JPH035095B2 JP H035095 B2 JPH035095 B2 JP H035095B2 JP 61064604 A JP61064604 A JP 61064604A JP 6460486 A JP6460486 A JP 6460486A JP H035095 B2 JPH035095 B2 JP H035095B2
Authority
JP
Japan
Prior art keywords
column
transistors
remaining
gates
connect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61064604A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62220028A (ja
Inventor
Atsushi Suzuki
Masaji Nagashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP61064604A priority Critical patent/JPS62220028A/ja
Priority to US07/022,292 priority patent/US4775810A/en
Priority to KR8702184A priority patent/KR900003071B1/ko
Priority to EP87104102A priority patent/EP0238091A3/en
Publication of JPS62220028A publication Critical patent/JPS62220028A/ja
Publication of JPH035095B2 publication Critical patent/JPH035095B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
    • H03K19/215—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical using field-effect transistors

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Detection And Correction Of Errors (AREA)
JP61064604A 1986-03-20 1986-03-20 論理回路 Granted JPS62220028A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP61064604A JPS62220028A (ja) 1986-03-20 1986-03-20 論理回路
US07/022,292 US4775810A (en) 1986-03-20 1987-03-05 Parity check logic circuit
KR8702184A KR900003071B1 (en) 1986-03-20 1987-03-12 Logic circuit
EP87104102A EP0238091A3 (en) 1986-03-20 1987-03-20 Logic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61064604A JPS62220028A (ja) 1986-03-20 1986-03-20 論理回路

Publications (2)

Publication Number Publication Date
JPS62220028A JPS62220028A (ja) 1987-09-28
JPH035095B2 true JPH035095B2 (en]) 1991-01-24

Family

ID=13263023

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61064604A Granted JPS62220028A (ja) 1986-03-20 1986-03-20 論理回路

Country Status (4)

Country Link
US (1) US4775810A (en])
EP (1) EP0238091A3 (en])
JP (1) JPS62220028A (en])
KR (1) KR900003071B1 (en])

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4989180A (en) * 1989-03-10 1991-01-29 Board Of Regents, The University Of Texas System Dynamic memory with logic-in-refresh
US5777608A (en) * 1989-03-10 1998-07-07 Board Of Regents, The University Of Texas System Apparatus and method for in-parallel scan-line graphics rendering using content-searchable memories
US5758148A (en) * 1989-03-10 1998-05-26 Board Of Regents, The University Of Texas System System and method for searching a data base using a content-searchable memory
US5043605A (en) * 1989-06-26 1991-08-27 At&T Bell Laboratories CMOS to ECL output buffer
US5341052A (en) * 1991-12-04 1994-08-23 North American Philips Corporation Arbiter with test capability and associated testing method
US5404448A (en) * 1992-08-12 1995-04-04 International Business Machines Corporation Multi-pixel access memory system
JP2807170B2 (ja) * 1993-06-01 1998-10-08 松下電器産業株式会社 演算装置
US5608741A (en) * 1993-11-23 1997-03-04 Intel Corporation Fast parity generator using complement pass-transistor logic
FR2720852B1 (fr) * 1994-06-01 1996-08-02 Matra Mhs Dispositif de détection de transition engendrant une impulsion de durée variable.
JP3708168B2 (ja) * 1995-06-13 2005-10-19 富士通株式会社 遅延装置
US5523707A (en) * 1995-06-30 1996-06-04 International Business Machines Corporation Fast, low power exclusive or circuit
US5748547A (en) * 1996-05-24 1998-05-05 Shau; Jeng-Jye High performance semiconductor memory devices having multiple dimension bit lines
US6148034A (en) * 1996-12-05 2000-11-14 Linden Technology Limited Apparatus and method for determining video encoding motion compensation vectors

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54101238A (en) * 1978-01-27 1979-08-09 Hitachi Ltd Parity circuit
JPS56126326A (en) * 1980-03-11 1981-10-03 Chiyou Lsi Gijutsu Kenkyu Kumiai Logic circuit

Also Published As

Publication number Publication date
EP0238091A3 (en) 1989-12-27
JPS62220028A (ja) 1987-09-28
KR900003071B1 (en) 1990-05-07
EP0238091A2 (en) 1987-09-23
US4775810A (en) 1988-10-04
KR870009552A (ko) 1987-10-27

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees